1N6267A Series 1500 Watt Mosorbt Zener Transient Voltage Suppressors Unidirectional http://onsemi.com Mosorb devices are designed to protect voltage sensitive components from high voltage, high-energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. These devices are ON Semiconductor's exclusive, cost-effective, highly reliable Surmetict axial leaded package and are ideally-suited for use in communication systems, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications, to protect CMOS, MOS and Bipolar integrated circuits. Cathode AXIAL LEAD CASE 41A PLASTIC Features * * * * * * * * Working Peak Reverse Voltage Range - 5.8 V to 214 V Peak Power - 1500 Watts @ 1 ms ESD Rating of Class 3 (>16 kV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5 mA Above 10 V UL 497B for Isolated Loop Circuit Protection Response Time is Typically < 1 ns Pb-Free Packages are Available* MARKING DIAGRAMS A 1.5KE xxxA YYWWG G A 1N6 xxx YYWWG G Mechanical Characteristics CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are readily solderable MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES: 260C, 1/16 in from the case for 10 seconds POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any A = Assembly Location 1.5KExxxA = ON Device Code 1N6xxx = JEDEC Device Code YY = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping 1.5KExxxAG Axial Lead (Pb-Free) 500 Units/Box 1.5KExxxARL4G Axial Lead (Pb-Free) 1500/Tape & Reel 1N6xxxAG Axial Lead (Pb-Free) 500 Units/Box 1N6xxxARL4G Axial Lead (Pb-Free) 1500/Tape & Reel Device *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (c) Semiconductor Components Industries, LLC, 2009 October, 2009 - Rev. 12 Anode 1 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Preferred devices are recommended choices for future use and best overall value. Publication Order Number: 1N6267A/D 1N6267A Series MAXIMUM RATINGS Symbol Value Unit Peak Power Dissipation (Note 1) @ TL 25C Rating PPK 1500 W Steady State Power Dissipation @ TL 25C, Lead Length = 3/8 in Derated above TL = 50C PD 5.0 W 50 mW/C Thermal Resistance, Junction-to-Lead RqJL 20 C/W Forward Surge Current (Note 2) @ TA = 25C IFSM 200 A Operating and Storage Temperature Range TJ, Tstg - 65 to +150 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Nonrepetitive current pulse per Figure 5 and derated above TA = 25C per Figure 2. 2. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum. ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted, VF = 3.5 V Max., IF (Note 3) = 100 A) Parameter Symbol IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT QVBR I IF Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM VC VBR VRWM Breakdown Voltage @ IT Test Current IR VF IT Maximum Temperature Coefficient of VBR IF Forward Current VF Forward Voltage @ IF IPP Uni-Directional TVS http://onsemi.com 2 V 1N6267A Series ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted, VF = 3.5 V Max. @ IF (Note 3) = 100 A) VC @ IPP (Note 7) Breakdown Voltage VRWM (Note 5) IR @ VRWM (Volts) (mA) Min Nom Device JEDEC Device (Note 4) 1.5KE6.8AG 1.5KE7.5AG 1.5KE8.2AG 1.5KE9.1AG 1N6267AG - 1N6269AG - 5.8 6.4 7.02 7.78 1000 500 200 50 6.45 7.13 7.79 8.65 6.8 7.5 8.2 9.1 7.14 7.88 8.61 9.55 10 10 10 1 10.5 11.3 12.1 13.4 143 132 124 112 0.057 0.061 0.065 0.068 1.5KE10AG 1.5KE11AG 1.5KE12AG 1.5KE13AG 1N6271AG - - 1N6274AG 8.55 9.4 10.2 11.1 10 5 5 5 9.5 10.5 11.4 12.4 10 11 12 13 10.5 11.6 12.6 13.7 1 1 1 1 14.5 15.6 16.7 18.2 103 96 90 82 0.073 0.075 0.078 0.081 1.5KE15AG 1.5KE16A, G 1.5KE18A, G 1.5KE20AG 1N6275AG 1N6276AG 1N6277AG 1N6278AG 12.8 13.6 15.3 17.1 5 5 5 5 14.3 15.2 17.1 19 15 16 18 20 15.8 16.8 18.9 21 1 1 1 1 21.2 22.5 25.2 27.7 71 67 59.5 54 0.084 0.086 0.088 0.09 - 1.5KE24AG 1.5KE27AG 1.5KE30AG 1N6279AG 1N6280AG 1N6281AG 1N6282AG 18.8 20.5 23.1 25.6 5 5 5 5 20.9 22.8 25.7 28.5 22 24 27 30 23.1 25.2 28.4 31.5 1 1 1 1 30.6 33.2 37.5 41.4 49 45 40 36 0.092 0.094 0.096 0.097 1.5KE33AG 1.5KE36AG 1.5KE39AG 1.5KE43AG 1N6283AG 1N6284AG 1N6285AG 1N6286AG 28.2 30.8 33.3 36.8 5 5 5 5 31.4 34.2 37.1 40.9 33 36 39 43 34.7 37.8 41 45.2 1 1 1 1 45.7 49.9 53.9 59.3 33 30 28 25.3 0.098 0.099 0.1 0.101 1.5KE47AG 1.5KE51AG 1.5KE56AG 1.5KE62AG 1N6287AG 1N6288A, G 1N6289AG 1N6290AG 40.2 43.6 47.8 53 5 5 5 5 44.7 48.5 53.2 58.9 47 51 56 62 49.4 53.6 58.8 65.1 1 1 1 1 64.8 70.1 77 85 23.2 21.4 19.5 17.7 0.101 0.102 0.103 0.104 1.5KE68AG 1.5KE75AG 1.5KE82A, G 1.5KE91AG 1N6291AG 1N6292AG - 1N6294AG 58.1 64.1 70.1 77.8 5 5 5 5 64.6 71.3 77.9 86.5 68 75 82 91 71.4 78.8 86.1 95.5 1 1 1 1 92 103 113 125 16.3 14.6 13.3 12 0.104 0.105 0.105 0.106 - 1N6295AG 85.5 5 95 100 105 1 137 11 0.106 VBR (Note 6) (Volts) @ IT VC IPP QVBR Max (mA) (Volts) (A) (%/C) Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value. 3. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum. 4. Indicates JEDEC registered data 5. A transient suppressor is normally selected according to the maximum working peak reverse voltage (VRWM), which should be equal to or greater than the dc or continuous peak operating voltage level. 6. VBR measured at pulse test current IT at an ambient temperature of 25C 7. Surge current waveform per Figure 5 and derate per Figures 1 and 2. The "G" suffix indicates Pb-Free package or Pb-Free packages are available. http://onsemi.com 3 100 PPK , PEAK POWER (kW) NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 5 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ TA = 25C 1N6267A Series 100 10 80 60 40 20 1 0 0.1ms 1ms 10ms 1 ms 100ms 10 ms 0 25 50 tP, PULSE WIDTH Figure 1. Pulse Rating Curve 10,000 Figure 2. Pulse Derating Curve 10,000 MEASURED @ ZERO BIAS MEASURED @ ZERO BIAS 1000 1000 C, CAPACITANCE (pF) C, CAPACITANCE (pF) 75 100 125 150 175 200 TA, AMBIENT TEMPERATURE (C) MEASURED @ VRWM 100 10 1 10 100 1000 MEASURED @ VRWM 100 10 1 10 VBR, BREAKDOWN VOLTAGE (VOLTS) 100 1000 VBR, BREAKDOWN VOLTAGE (VOLTS) 3/8 3/8 5 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP. tr 10ms tr IPP, VALUE (%) PD , STEADY STATE POWER DISSIPATION (WATTS) Figure 3. Capacitance versus Breakdown Voltage 4 3 PEAK VALUE - IPP 100 HALF VALUE - IPP 2 50 2 tP 1 0 0 0 25 50 75 100 125 150 175 TL, LEAD TEMPERATURE (C) 200 0 1 2 3 t, TIME (ms) Figure 4. Steady State Power Derating Figure 5. Pulse Waveform http://onsemi.com 4 4 1N6267A Series VBR(NOM)=6.8 to 13V 20V 24V TL=25C tP=10ms 1 0.7 0.5 43V 200 75V 0.3 100 DERATING FACTOR IT , TEST CURRENT (AMPS) 1000 500 50 20 180V 10 120V 5 0.2 PULSE WIDTH 10 ms 0.1 0.07 0.05 1 ms 0.03 100 ms 0.02 2 10 ms 1 0.01 0.1 0.3 0.5 0.7 1 2 3 5 7 10 20 30 DVBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR(NOM) (VOLTS) Figure 6. Dynamic Impedance 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 Figure 7. Typical Derating Factor for Duty Cycle APPLICATION NOTES RESPONSE TIME circuit layout, minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation. In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitance effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 8. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 9. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. These devices have excellent response time, typically in the picosecond range and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper DUTY CYCLE DERATING The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 7. Average power must be derated as the lead or ambient temperature rises above 25C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 7 appear to be in error as the 10 ms pulse has a higher derating factor than the 10 ms pulse. However, when the derating factor for a given pulse of Figure 7 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend. http://onsemi.com 5 1N6267A Series TYPICAL PROTECTION CIRCUIT Zin LOAD Vin V V Vin (TRANSIENT) VL OVERSHOOT DUE TO INDUCTIVE EFFECTS Vin (TRANSIENT) VL VL Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t t Figure 8. Figure 9. UL RECOGNITION* Conditioning, Temperature test, Dielectric VoltageWithstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category. The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGQ2) under the UL standard for safety 497B and File #E210057. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests including Strike Voltage Breakdown test, Endurance *Applies to 1.5KE6.8A thru 1.5KE250A http://onsemi.com 6 1N6267A Series PACKAGE DIMENSIONS MOSORB CASE 41A-04 ISSUE D B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. LEAD FINISH AND DIAMETER UNCONTROLLED IN DIMENSION P. 4. 041A-01 THRU 041A-03 OBSOLETE, NEW STANDARD 041A-04. D K P P DIM A B D K P A INCHES MIN MAX 0.335 0.374 0.189 0.209 0.038 0.042 1.000 ----0.050 MILLIMETERS MIN MAX 8.50 9.50 4.80 5.30 0.96 1.06 25.40 ----1.27 K Mosorb and Surmetic are trademarks of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 http://onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative 1N6267A/D