© Semiconductor Components Industries, LLC, 2009
October, 2009 Rev. 12
1Publication Order Number:
1N6267A/D
1N6267A Series
1500 Watt Mosorbt Zener
Transient Voltage
Suppressors
Unidirectional
Mosorb devices are designed to protect voltage sensitive
components from high voltage, highenergy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. These devices are
ON Semiconductors exclusive, cost-effective, highly reliable
Surmetict axial leaded package and are ideally-suited for use in
communication systems, numerical controls, process controls,
medical equipment, business machines, power supplies and many
other industrial/consumer applications, to protect CMOS, MOS and
Bipolar integrated circuits.
Features
Working Peak Reverse Voltage Range 5.8 V to 214 V
Peak Power 1500 Watts @ 1 ms
ESD Rating of Class 3 (>16 kV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5 mA Above 10 V
UL 497B for Isolated Loop Circuit Protection
Response Time is Typically < 1 ns
PbFree Packages are Available*
Mechanical Characteristics
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES:
260°C, 1/16 in from the case for 10 seconds
POLARITY: Cathode indicated by polarity band
MOUNTING POSITION: Any
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D. Preferred devices are recommended choices for future use
and best overall value.
Cathode Anode
Device Package Shipping
ORDERING INFORMATION
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For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1N6xxxARL4G Axial Lead
(PbFree)
1500/Tape & Reel
1N6xxxAG 500 Units/BoxAxial Lead
(PbFree)
1.5KExxxARL4G 1500/Tape & ReelAxial Lead
(PbFree)
1.5KExxxAG 500 Units/BoxAxial Lead
(PbFree)
AXIAL LEAD
CASE 41A
PLASTIC
MARKING DIAGRAMS
A = Assembly Location
1.5KExxxA = ON Device Code
1N6xxx = JEDEC Device Code
YY = Year
WW = Work Week
G= PbFree Package
A
1N6
xxx
YYWWG
G
A
1.5KE
xxxA
YYWWG
G
(Note: Microdot may be in either location)
UniDirectional TVS
IPP
IF
V
I
IR
IT
VRWM
VCVBR
VF
1N6267A Series
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2
MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation (Note 1) @ TL 25°C PPK 1500 W
Steady State Power Dissipation
@ TL 25°C, Lead Length = 3/8 in
Derated above TL = 50°C
PD5.0
50
W
mW/°C
Thermal Resistance, JunctiontoLead RqJL 20 °C/W
Forward Surge Current (Note 2) @ TA = 25°C IFSM 200 A
Operating and Storage Temperature Range TJ, Tstg 65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Nonrepetitive current pulse per Figure 5 and derated above TA = 25°C per Figure 2.
2. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless
otherwise noted, VF = 3.5 V Max., IF (Note 3) = 100 A)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
QVBR Maximum Temperature Coefficient of VBR
IFForward Current
VFForward Voltage @ IF
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 3.5 V Max. @ IF (Note 3) = 100 A)
Device
JEDEC
Device
(Note 4)
VRWM
(Note 5) IR @ VRWM
Breakdown Voltage VC @ IPP (Note 7)
QVBR
VBR (Note 6) (Volts) @ ITVCIPP
(Volts) (mA) Min Nom Max (mA) (Volts) (A) (%/°C)
1.5KE6.8AG 1N6267AG 5.8 1000 6.45 6.8 7.14 10 10.5 143 0.057
1.5KE7.5AG 6.4 500 7.13 7.5 7.88 10 11.3 132 0.061
1.5KE8.2AG 1N6269AG 7.02 200 7.79 8.2 8.61 10 12.1 124 0.065
1.5KE9.1AG 7.78 50 8.65 9.1 9.55 1 13.4 112 0.068
1.5KE10AG 1N6271AG 8.55 10 9.5 10 10.5 1 14.5 103 0.073
1.5KE11AG 9.4 5 10.5 11 11.6 1 15.6 96 0.075
1.5KE12AG 10.2 5 11.4 12 12.6 1 16.7 90 0.078
1.5KE13AG 1N6274AG 11.1 5 12.4 13 13.7 1 18.2 82 0.081
1.5KE15AG 1N6275AG 12.8 5 14.3 15 15.8 1 21.2 71 0.084
1.5KE16A, G 1N6276AG 13.6 5 15.2 16 16.8 1 22.5 67 0.086
1.5KE18A, G 1N6277AG 15.3 5 17.1 18 18.9 1 25.2 59.5 0.088
1.5KE20AG 1N6278AG 17.1 5 19 20 21 1 27.7 54 0.09
1N6279AG 18.8 5 20.9 22 23.1 1 30.6 49 0.092
1.5KE24AG 1N6280AG 20.5 5 22.8 24 25.2 1 33.2 45 0.094
1.5KE27AG 1N6281AG 23.1 5 25.7 27 28.4 1 37.5 40 0.096
1.5KE30AG 1N6282AG 25.6 5 28.5 30 31.5 1 41.4 36 0.097
1.5KE33AG 1N6283AG 28.2 5 31.4 33 34.7 1 45.7 33 0.098
1.5KE36AG 1N6284AG 30.8 5 34.2 36 37.8 1 49.9 30 0.099
1.5KE39AG 1N6285AG 33.3 5 37.1 39 41 1 53.9 28 0.1
1.5KE43AG 1N6286AG 36.8 5 40.9 43 45.2 1 59.3 25.3 0.101
1.5KE47AG 1N6287AG 40.2 5 44.7 47 49.4 1 64.8 23.2 0.101
1.5KE51AG 1N6288A, G 43.6 5 48.5 51 53.6 1 70.1 21.4 0.102
1.5KE56AG 1N6289AG 47.8 5 53.2 56 58.8 1 77 19.5 0.103
1.5KE62AG 1N6290AG 53 5 58.9 62 65.1 1 85 17.7 0.104
1.5KE68AG 1N6291AG 58.1 5 64.6 68 71.4 1 92 16.3 0.104
1.5KE75AG 1N6292AG 64.1 5 71.3 75 78.8 1 103 14.6 0.105
1.5KE82A, G 70.1 5 77.9 82 86.1 1 113 13.3 0.105
1.5KE91AG 1N6294AG 77.8 5 86.5 91 95.5 1 125 12 0.106
1N6295AG 85.5 5 95 100 105 1 137 11 0.106
Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value.
3. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
4. Indicates JEDEC registered data
5. A transient suppressor is normally selected according to the maximum working peak reverse voltage (VRWM), which should be equal to or
greater than the dc or continuous peak operating voltage level.
6. VBR measured at pulse test current IT at an ambient temperature of 25°C
7. Surge current waveform per Figure 5 and derate per Figures 1 and 2.
The “G” suffix indicates PbFree package or PbFree packages are available.
1N6267A Series
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4
Figure 1. Pulse Rating Curve
100
80
60
40
20
0
0 25 50 75 100 125 150 175 200
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ TA= 25 C°
TA, AMBIENT TEMPERATURE (°C)
Figure 2. Pulse Derating Curve
5
4
3
2
1
25 50 75 100 125 150 175 200
PD, STEADY STATE POWER DISSIPATION (WATTS)
TL, LEAD TEMPERATURE (°C)
3/8
3/8
0
0
100
50
001 2 3 4
t, TIME (ms)
, VALUE (%)
tr
tP
PEAK VALUE - IPP
HALF VALUE - IPP
2
PULSE WIDTH (tP) IS DEFINED AS
THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50% OF IPP
.
tr 10ms
1ms 10ms 100ms1 ms 10 ms
100
10
1
tP
, PULSE WIDTH
PPK, PEAK POWER (kW)
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 5
0.1ms
IPP
Figure 3. Capacitance versus Breakdown Voltage
VBR, BREAKDOWN VOLTAGE (VOLTS)
1 10 100 1000
10,000
1000
100
10
C, CAPACITANCE (pF)
MEASURED @ VRWM
MEASURED @
ZERO BIAS
Figure 4. Steady State Power Derating Figure 5. Pulse Waveform
VBR, BREAKDOWN VOLTAGE (VOLTS)
1 10 100 1000
10,000
1000
100
10
C
,
CAPACITANCE
(
p
F)
MEASURED @
ZERO BIAS
MEASURED @ VRWM
1N6267A Series
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5
Figure 6. Dynamic Impedance
1000
500
200
100
50
20
10
5
2
1
0.3 0.5 0.7 1 2 3 5 7 10 20 30
DVBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR(NOM) (VOLTS)
VBR(NOM)=6.8 to 13V
20V
24V 43V
75V
180V
120V
Figure 7. Typical Derating Factor for Duty Cycle
DERATING FACTOR
1 ms
10 ms
1
0.7
0.5
0.3
0.05
0.1
0.2
0.01
0.02
0.03
0.07
100 ms
0.1 0.2 0.5 2 5 10 5012010
0
D, DUTY CYCLE (%)
PULSE WIDTH
10 ms
TL=25°C
tP=10ms
IT, TEST CURRENT (AMPS)
APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitance
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 8.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 9. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. These devices have
excellent response time, typically in the picosecond range
and negligible inductance. However, external inductive
effects could produce unacceptable overshoot. Proper
circuit layout, minimum lead lengths and placing the
suppressor device as close as possible to the equipment or
components to be protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25°C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25°C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 ms pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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6
TYPICAL PROTECTION CIRCUIT
Vin
VL
V
Vin
Vin (TRANSIENT)
VL
td
V
VL
Vin (TRANSIENT)
Zin
LOAD
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
tt
Figure 8. Figure 9.
UL RECOGNITION*
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGQ2)
under the UL standard for safety 497B and File #E210057.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
including Strike Voltage Breakdown test, Endurance
Conditioning, Temperature test, Dielectric Voltage-
Withstand test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
*Applies to 1.5KE6.8A thru 1.5KE250A
1N6267A Series
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7
PACKAGE DIMENSIONS
MOSORB
CASE 41A04
ISSUE D
DIM
A
MIN MAX MIN MAX
MILLIMETERS
0.335 0.374 8.50 9.50
INCHES
B0.189 0.209 4.80 5.30
D0.038 0.042 0.96 1.06
K1.000 --- 25.40 ---
P--- 0.050 --- 1.27
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. LEAD FINISH AND DIAMETER UNCONTROLLED
IN DIMENSION P.
4. 041A-01 THRU 041A-03 OBSOLETE, NEW
STANDARD 041A-04.
D
K
P
PA
K
B
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81357733850
1N6267A/D
Mosorb and Surmetic are trademarks of Semiconductor Components Industries, LLC.
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