7 fo 1 egaP 00.2.veR 0020JE3300SD90R
Jul 04, 2012
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NE5550279A
Silicon Power LDMOS FET
FEATURES
•High Output Power : Pout = 33.0 dBm TYP. (VDS = 7.5 V, IDset = 40 mA, f = 460 MHz, Pin = 15 dBm)
•High power added efficiency : ηadd = 68% TYP. (VDS = 7.5 V, IDset = 40 mA, f = 460 MHz, Pin = 15 dBm)
•High Linear gain : GL= 22.5 dB TYP. (VDS = 7.5 V, IDset= 40 mA, f = 460 MHz, Pin = 0 dBm)
•High ESD tolerance
•Suitable for VHF to UHF-BAND Class-AB power amplifier.
APPLICATIONS
•150 MHz Band Radio System
•460 MHz Band Radio System
•900 MHz Band Radio System
ORDERING INFORMATION
Part Number Order Number Package Marking Supplying Form
NE5550279A NE5550279A-A 79A
(Pb Free)
W7 •12 mm wide embossed taping
•Gate pin faces the perforation side of the tape
NE5550279A-T1 NE5550279A-T1-A •12 mm wide embossed taping
•Gate pin faces the perforation side of the tape
•Qty 1 kpcs/reel
NE5550279A-T1A NE5550279A-T1A-A •12 mm wide embossed taping
•Gate pin faces the perforation side of the tape
•Qty 5 kpcs/reel
Remark To order evaluation samples, please contact your nearby sales office.
Part number for sample order: NE5550279A-A
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified)
Operation in excess of any one of these parameters may result in permanent damage.
Parameter Symbol Ratings Unit
Drain to Source Voltage VDS 30 V
Gate to Source Voltage VGS 6.0 V
I tnerruC niarD DS 0.6 A
Drain Current
(50% Duty Pulsed)
IDS-pulse 1.2 A
Total Power Dissipation Note Ptot 6.25 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg −55 to +150 °C
Note: Value at TC = 25°C
CAUTION
Observe precautions when handling because these devices are sensitive to electrostatic discharge.
R09DS0033EJ0200
Rev.2.00
Jul 04, 2012
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 2 of 7
Jul 04, 2012
RECOMMENDED OPERATING RANGE (TA = 25°C)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Drain to Source Voltage VDS − 7.5 9.0 V
Gate to Source Voltage VGS 1.65 2.20 2.85 V
Drain Current IDS − 0.4 − A
Input Power Pin f = 460 MHz, VDS = 7.5 V − 15 20 dBm
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
DC Characteristics
Gate to Source Leakage Current IGSS V
GS = 6.0 V − − 100 nA
Drain to Source Leakage Current
(Zero Gate Voltage Drain Current) IDSS V
DS = 25 V − − 10 μA
Gate Threshold Voltage Vth V
DS = 7.5 V, IDS = 1.0 mA 1.15 1.65 2.25 V
Drain to Source Breakdown Voltage BVDSS I
DS = 10 μA 25 38 − V
Transconductance Gm V
DS = 7.5 V, IDS = 140±20 mA 0.36 0.44 0.58 S
Thermal Resistance Rth Channel to Case − 20.0 − °C/W
RF Characteristics
Output Power Pout f = 460 MHz, VDS = 7.5 V, 31.5 33.0 − dBm
Drain Current I DS P
in = 15 dBm, − 0.38 − A
Power Drain Efficiency
η
d I
Dset = 40 mA (RF OFF) − 70 − %
Power Added Efficiency
η
add − 68 − %
Linear Gain GL Note − 22.5 − dB
Note: Pin = 0 dBm
Remark DC performance is 100% testing. RF performance is testing several samples per wafer.
Wafer rejection criteria for standard devices is 1 reject for several samples.
<R>
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 3 of 7
Jul 04, 2012
TEST CIRCUIT SCHEMATIC FOR 460 MHz
C20
C10 L2 L3 L4
IN OUT
C22
C11 C13 C21
C12 C14
C1
VDS
C1 L1R1
VGS
FET
NE5550279A
50 Ω50 Ω
COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS
Symbol Value Type Maker
C1 1
μ
F GRM188B31C105KA92 Murata
C10 22 pF GRM1882C1H220JA01 Murata
C11 1.2 pF ATC100A1R2JW American Technical
Ceramics
C12 4.7 pF ATC100A4R7BW American Technical
Ceramics
C13 15 pF ATC100A150BW American Technical
Ceramics
C14 12 pF ATC100A120BW American Technical
Ceramics
C20 10 pF ATC100A100JW American Technical
Ceramics
C21 3.9 pF ATC100A3R9BW American Technical
Ceramics
C22 100 pF ATC100A101JW American Technical
Ceramics
R1 2 kΩ 1/10 W Chip Resistor KOA
RK73B1JTTD202J
L1 123 nH
φ
0.5 mm,
φ
D = 3 mm, 10 Turns Ohesangyou
L2 10 nH LQW18AN10NG00 Murata
L3 9.8 nH
φ
0.4 mm,
φ
D = 1.6 mm, 3 Turns Ohesangyou
L4 20 nH
φ
0.5 mm,
φ
D = 3 mm, 2 Turns Ohesangyou
PCB − R4775, t = 0.4 mm,
ε
r = 4.5, size = 30 × 48 mm Panasonic
SMA Connecter − WAKA 01K0790-20 WAKA
COMPONENT LAYOUT OF TEST CIRCUIT FOR 460 MHz
L1 C1
C1
L2
C10
L3 L4 C22
C20
C12
C14
C11
C21
R1
C13
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 4 of 7
Jul 04, 2012
TYPICAL CHARACTERISTICS 1 (TA = 25°C)
R: f = 460 MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 40 mA, P in = −10 to 20 dBm
IM: f1 = 460 MHz, f2 = 461 MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 40 mA, Pout (2 tone) = 8 to 32 dB m
40
25
0.1
0
1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
–10
–5
10
15
0
5
25
20
30
35
–15 –10 –5 0 5 10 15 20
P
out
- 3.6 V
P
out
- 4.5 V
P
out
- 6.0 V
P
out
- 7.5 V
P
out
- 9.0 V
I
DS
- 3.6 V
I
DS
- 6.0 V
I
DS
- 4.5 V
I
DS
- 9.0 V
I
DS
- 7.5 V
40
25
10
0
80
20
30
40
50
60
70
0
5
10
15
20
25
30
35
–15 –10 –5 0 5 10 15 20
G
p
- 3.6 V
G
p
- 4.5 V
G
p
- 6.0 V
G
p
- 7.5 V
G
p
- 9.0 V
add
- 3.6 V
add
- 6.0 V
add
- 4.5 V
add
- 9.0 V
add
- 7.5 V
D
D
D
D
D
–70
0
–10
–20
–30
–40
–50
–60
–70
0
–10
–20
–30
–40
–50
–60
4030252051015 35 3530252051015
2f
0
- 3.6 V
2f
0
- 4.5 V
2f
0
- 6.0 V
2f
0
- 7.5 V
2f
0
- 9.0 V
3f
0
- 3.6 V
3f
0
- 6.0 V
3f
0
- 4.5 V
3f
0
- 9.0 V
3f
0
- 7.5 V
IM
3
- 3.6 V
IM
3
- 4.5 V
IM
3
- 6.0 V
IM
3
- 7.5 V
IM
3
- 9.0 V
IM
5
- 3.6 V
IM
5
- 6.0 V
IM
5
- 4.5 V
IM
5
- 9.0 V
IM
5
- 7.5 V
3rd/5th Order Intermodulation Distortion IM
3
/IM
5
(dBc)
2 Tones Output Power P
out
(2 tone) (dBm)
Output Power P
out
(dBm)
Drain Current I
DS
(A)
Input Power P
in
(dBm)
Power Gain G
P
(dB)
Power Added Efficiency
add
(%)
η
Input Power P
in
(dBm)
2nd Harmonics 2f
0
(dBc)
3rd Harmonics 3f
0
(dBc)
Output Power P
out
(dBm)
IM3/IM5 vs. 2 TONES OUTPUT POWER
2f0, 3f0 vs. OUTPUT POWER
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
POWER GAIN, POWER ADDED
EFFICIENCY vs. INPUT POWER
Remark The graphs indicate nominal characteristics.
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 5 of 7
Jul 04, 2012
S-PARAMETERS
S-parameters and noise parameters are provided on our web site in a form (S2P) that enables direct import of the
parameters to microwave circuit simulators without the need for keyboard inputs.
Click here to download S-parameters.
[Products] → [RF Devices] → [Device Parameters]
URL http://www.renesas.com/products/microwave/
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 6 of 7
Jul 04, 2012
PACKAGE DIMENSIONS
79A (UNIT: mm)
0.9±0.2
0.2±0.1
0.4±0.15
5.7 MAX.
5.7 MAX.
0.6±0.15
0.8±0.15
4.4 MAX.
4.2 MAX.
Source
Gate Drain
(Bottom View)
3.6±0.2
1.5±0.2
1.2 MAX.
0.8 MAX.
1.0 MAX.
Source
Gate Drain
W 7
27001
79A PACKAGE RECOMMENDED P.C.B. LAYO U T (U NIT: mm)
1.7
4.0
0.5
1.0
5.9
1.2
Gate
Source
Drain
0.5
6.1
0.5
Through Hole: 0.2 × 33
φ
Stop up the hole with a rosin or
something to avoid solder flow.
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NE5550279A
R09DS0033EJ0200 Rev.2.00 Page 7 of 7
Jul 04, 2012
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered and mounted under the following recommended conditions. For so ldering methods and
conditions other than those recommended b e low, contact your nearby sales office.
Soldering Method Soldering Conditions Condition Symbol
Infrared Reflow Peak temperature (package surface temperature) : 260°C or below
Time at peak temperature : 10 seconds or less
Time at temperature of 220°C or higher : 60 seconds or less
Preheating time at 120 to 180°C : 120±30 seconds
Maximum number of reflow processes : 3 times
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
IR260
Wave Soldering Peak temperature (molten solder temperature) : 260°C or below
Time at peak temperature : 10 seconds or less
Preheating temperature (package surface temperature)
: 120°C or below
Maximum number of flow processes : 1 time
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
WS260
Partial Heating Peak temperature (terminal temperature) : 350°C or below
Soldering time (per side of device) : 3 seconds or less
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
HS350
CAUTION
Do not use different soldering methods together (exce pt for partial h eating).
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All trademarks and registered trademarks are t he property of their respective o wners.
C - 1
Revision History NE5550279A Data Sheet
Description
Rev. Date Page Summary
1.00 Mar 28, 2012 − First edition issued
2.00 Jul 04, 2012 p.2 Modification of ELECTRICAL CHARACTERISTICS
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NOTICE
1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and
application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California
Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits,
software, or information.
2. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does
not warrant that such information is error free. California Eastern Laboratories and Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
3. California Eastern Laboratories and Renesas Electronics do not assume any liability for infringement of patents, copyrights, or other intellectual property
rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express,
implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of California Eastern Laboratories or Renesas
Electronics or others.
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Laboratories and Renesas Electronics assume no responsibility for any losses incurred by you or third parties arising from such alteration, modication, copy
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for each Renesas Electronics product depends on the product’s quality grade, as indicated below. “Standard”: Computers; ofce equipment; communications
equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and
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the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation
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Electronics products, or if you have any other inquiries.
NOTE 1: “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.
NOTE 2: “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
NOTE 3: Products and product information are subject to change without notice.
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