1. Product profile
1.1 General description
The BF1218 is a combination of two dual gate MOSFET amplifiers with shared source
and gate2 leads and an integrated switch. The integrated switch is operated by the gate 1
bias of amplifier B.
The source and substrate are interconnected. Internal bias circuits enable DC stabilization
and a very good cross modulation performance during Automatic Gain Control (AGC).
Integrated diodes between the gates and source protect again st excessive input voltage
surges. The transistor has a SOT363 micro- miniature plastic package.
1.2 Features and benefits
Two low noise gain controlled amplifiers in a single package. One with a fu lly
integrated bias and one with a partly integrated bias
Internal switch to save external components
Superior cross modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance ratio
1.3 Applications
Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply
voltage
digital and analog television tuners
professional communication equipment
BF1218
Dual N-channel dual gate MOSFET
Rev. 01 — 14 April 2010 Product data sheet
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 2 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
1.4 Quick reference data
[1] Tsp is the temperature at the soldering point of the source lead.
[2] Calculated from S-parameters.
[3] Measured in Figure 33 test circuit.
[4] Measured in Figure 34 test circuit.
2. Pinning information
Table 1. Quick reference data
Per MOSFET unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage DC - - 6 V
IDdrain current DC - - 30 mA
Ptot total power dissipation Tsp 109 C[1] - - 180 mW
yfsforward transfer admittance f = 100 MHz; Tj = 25 C
amplifier A; ID=19mA 26 31 41 mS
amplifier B; ID=15mA 25 30 40 mS
Ciss(G1) input capacitance at gate1 f = 100 MHz
amplifier A [2] -2.12.6pF
amplifier B [2] -2.12.6pF
Crss reverse transfer capacit a nc e f = 100 MHz [2] -20-fF
NF noise figure YS=Y
S(opt)
amplifier A; f = 400 MHz - 0.9 1.5 dB
amplifier B; f = 800 MHz - 1.4 2.0 dB
Xmod cross modulation input level for k = 1 %;
fw=50MHz;
funw =60MHz
at 40 dB AGC
amplifier A [3] 102 105 - dBV
amplifier B [4] 102 105 - dBV
Tjjunction temperature - - 150 C
Table 2. Discrete pinning
Pin Description Simplified outline Graphic symbo l
1 gate1 (AMP A)
2gate2
3 gate1 (AMP B)
4 drain (AMP B)
5source
6 drain (AMP A)
132
4
56
sym089
G1B
G1A
G2 S
DA
DB
AMP B
AMP A
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Product data sheet Rev. 01 — 14 April 2010 3 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
3. Ordering information
4. Marking
5. Limiting values
[1] Tsp is the temperature at the soldering point of the source lead.
Table 3. Ordering information
Type number Package
Name Description Version
BF1218 - plastic surface-mounted package; 6 leads SOT363
Table 4. Marking codes
Type number Marking code
BF1218 M7
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per MOSFET
VDS drain-source voltage DC - 6 V
IDdrain current DC - 30 mA
IG1 gate1 current - 10 mA
IG2 gate2 current - 10 mA
Ptot total power dissipation Tsp 109 C[1] -180mW
Tstg storage temperature 65 +150 C
Tjjunction temperature - 150 C
Fig 1. Power derating curve
Tsp (˚C)
0 20015050 100
001aac193
100
150
50
200
250
Ptot
(mW)
0
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Product data sheet Rev. 01 — 14 April 2010 4 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
6. Thermal characteristics
7. Static characteristics
[1] RG1 connects gate1 (B) to VGG = 0 V (see Figure 3).
[2] RG1 connects gate1 (B) to VGG = 5 V (see Figure 3).
Table 6. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-sp) thermal resistance from junction to solder point 225 K/W
Table 7. Static characteristics
Tj=25
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per MOSFET; unless otherwise specified
V(BR)DSS drain-source breakdown voltage VG1-S =V
G2-S =0V; I
D=10A
amplifier A 6 - - V
amplifier B 6 - - V
V(BR)G1-SS gate1-source breakdown voltage VG2-S =V
DS =0V; I
G1-S =10mA 6 - 10 V
V(BR)G2-SS gate2-source breakdown voltage VG1-S =V
DS =0V; I
G2-S =10mA 6 - 10 V
VF(S-G1) forward source-gate1 voltage VG2-S =V
DS =0V; I
S-G1 = 10 mA 0.5 - 1.5 V
VF(S-G2) forward source-gate2 voltage VG1-S =V
DS =0V; I
S-G2 = 10 mA 0.5 - 1.5 V
VG1-S(th) gate1-source threshold voltage VDS =5V; V
G2-S =4V; I
D=100A 0.3 - 1.0 V
VG2-S(th) gate2-source threshold voltage VDS =5V; V
G1-S =5V; I
D=100A 0.4 - 1.0 V
IDS drain-source current VG2-S =4V; V
DS(B) =5V; R
G1 =86k
amplifier A; VDS(A) =5V [1] 14 - 24 mA
amplifier B [2] 10 - 20 mA
IG1-S gate1 cut-off current VG2-S =V
DS(A) =0V
amplifier A; VG1-S(A) =5V; I
D(B) =0A - - 50 nA
amplifier B; VG1-S(B) =5V; V
DS(B) =0V - - 50 nA
IG2-S gate2 cut-off current VG2-S =4V; V
G1-S(B) =0V;
VG1-S(A) =V
DS(A) =V
DS(B) =0V --20nA
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 5 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
8. Dynamic characteristics
8.1 Dynamic characteristics for amplifier A
(1) ID(B); RG1 =68k.
(2) ID(B); RG1 =86k.
(3) ID(B); RG1 = 100 k.
(4) ID(A); RG1 = 100 k.
(5) ID(A); RG1 =86k.
(6) ID(A); RG1 =68k.
VGG = 5 V: amplifier A is off; amplifier B is on.
VGG = 0 V: amplifier A is on; amplifier B is off.
Fig 2. Drain currents of MOSFET A and B as a
function of VGG
Fig 3. Functional diagram
VGG (V)
054231
001aag356
8
12
4
16
20
ID
(mA)
0
(1)
(2)
(3)
(4)
(5)
(6)
001aac205
R
G1
V
GG
G1B
G2
G1A
DB
S
DA
Table 8. Dynamic characteristics for amplifier A[1]
Common source; Tamb =25
C; VG2-S =4V; V
DS =5V; I
D= 19 mA; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
yfsforward transfer admittance f = 100 MHz; Tj=25C263141mS
Ciss(G1) input capacitance at gate1 f = 100 MHz [2] -2.12.6pF
Ciss(G2) input capacitance at gate2 f = 100 MHz [2] -3.4-pF
Coss output capacitance f = 100 MHz [2] -0.8-pF
Crss reverse transfer capacitance f = 100 MHz [2] -20-fF
Gtr transducer power gain BS=B
S(opt); BL=B
L(opt)
f=200MHz; G
S=2mS; G
L= 0.5 mS 32 36 40 dB
f=400MHz; G
S=2mS; G
L= 1 mS 28 32 36 dB
f=800MHz; G
S= 3.3 mS; GL= 1 mS 24 28 33 dB
NF noise figure f = 11 MHz; GS=20mS; B
S= 0 S - 3.0 - dB
f=400MHz; Y
S=Y
S(opt) -0.91.5dB
f=800MHz; Y
S=Y
S(opt) -1.11.7dB
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Product data sheet Rev. 01 — 14 April 2010 6 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
[1] For the MOSFET not in use: VG1-S(B) =0V; V
DS(B) =0V.
[2] Calculated from S-parameters.
[3] Measured in Figure 33 test circuit.
8.1.1 Graphics for amplifier A
Xmod cross modulation input level for k = 1 %; fw=50MHz;
funw =60MHz [3]
at 0 dB AGC 90 - - dBV
at 10 dB AGC - 90 - dBV
at 20 dB AGC - 99 - dBV
at 40 dB AGC 102 105 - dBV
Table 8. Dynamic characteristics for amplifier A[1] …continued
Common source; Tamb =25
C; VG2-S =4V; V
DS =5V; I
D= 19 mA; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
(1) VG2-S =4V.
(2) VG2-S =3.5V.
(3) VG2-S =3V.
(4) VG2-S =2.5V.
(5) VG2-S =2V.
(6) VG2-S =1.5V.
(7) VG2-S =1V.
VDS(A) =5V; V
G1-S(B) =V
DS(B) =0V; T
j=25C.
(1) VG1-S(A) =1.8V.
(2) VG1-S(A) =1.7V.
(3) VG1-S(A) =1.6V.
(4) VG1-S(A) =1.5V.
(5) VG1-S(A) =1.4V.
(6) VG1-S(A) =1.3V.
(7) VG1-S(A) =1.2V.
(8) VG1-S(A) =1.1V.
(9) VG1-S(A) =1V.
VG2-S =4V; V
G1-S(B) =V
DS(B) =0V; T
j=25C.
Fig 4. Amplifier A: transfer characteristics; typical
values Fig 5. Amplifier A: output characteristics; typical
values
VG1-S (V)
021.60.8 1.20.4
001aaa554
10
20
30
ID
(mA)
0
(1)
(2)
(3) (4)
(5)
(7)
(6)
001aaa555
VDS (V)
0642
16
8
24
32
ID
(mA)
0
(2)
(3)
(4)
(6)
(7)
(9)
(8)
(5)
(1)
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Product data sheet Rev. 01 — 14 April 2010 7 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
(1) VG2-S =4V.
(2) VG2-S =3.5V.
(3) VG2-S =3V.
(4) VG2-S =2.5V.
(5) VG2-S =2V.
(6) VG2-S =1.5V.
VDS(A) =5V; V
G1-S(B) =V
DS(B) =0V; T
j=25C.
VDS(A) =5V; V
G2-S =4V; V
DS(B) =5V; V
G1-S(B) =0V;
Tj=25C.
ID(B) = internal gate1 current = current in pin
drain (AMP B) if MOSFET (B) is switched off.
Fig 6. Amplifier A: forward transfer admittance as a
function of drain cur rent; typical values Fig 7. Amplifier A: drain current as a function of
internal gate1 current; ty pical values
ID (mA)
03224816
001aaa556
20
10
30
40
yfs
(mS)
0
(1) (2)
(3)
(4)
(5)
(6)
001aac206
ID(B) (μA)
0604020
8
12
4
16
20
ID(A)
(mA)
0
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Product data sheet Rev. 01 — 14 April 2010 8 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
VDS(A) =V
DS(B) =V
sup; VG2-S =4V; T
j=25C;
RG1 =86k(connected to ground); see Figure 3.(1) VDS(B) =5V.
(2) VDS(B) =4.5V.
(3) VDS(B) =4V.
(4) VDS(B) =3.5V.
(5) VDS(B) =3V.
(6) VDS(B) =2.5V.
VDS(A) =5V; V
G1-S(B) = 0 V; gate1 (AMPA) is open;
Tj=25C.
Fig 8. Amplifier A: drain current of amplifier A as a
function of supply voltage of A and B
amplifier; typical values
Fig 9. Amplifier A: drain current as a function of
gate2 voltage; typical values
VDS(A) =V
DS(B) =5V; V
G1-S(B) =0V; f
w=50MHz;
funw =60MHz; T
amb =25C; see Figure 33.VDS(A) =V
DS(B) =5V; V
G1-S(B) = 0 V; f = 50 MHz; see
Figure 33.
Fig 10. Amplifier A: unwanted voltage for 1 %
cross modul ation as a function of gain
reduction; typical values
Fig 11. Amplifier A: gain reduction as a function of
AGC voltage; typical values
Vsup (V)
054231
001aaa558
8
12
4
16
20
ID
(mA)
0
001aaa559
VG2-S (V)
0642
16
8
24
32
ID
(mA)
0
(1)
(2)
(3)
(4)
(5)
(6)
gain reduction (dB)
0504020 3010
001aac195
100
90
110
120
Vunw
(dBμV)
80
VAGC (V)
04312
001aac196
30
20
40
10
0
gain
reduction
(dB)
50
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Product data sheet Rev. 01 — 14 April 2010 9 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
VDS(A) =V
DS(B) =5V; V
G1-S(B) =0V; f=50MHz;
Tamb =25C; see Figure 33.VDS(A) =5V; V
G2-S =4V; V
DS(B) =V
G1-S(B) =0V;
ID(A) =19mA
Fig 12. Amplifier A: drain current as a function of g ain
reduction; typical values Fig 13. Amplifier A: input adm ittance as a function of
frequency; typical values
VDS(A) =5V; V
G2-S =4V; V
DS(B) =V
G1-S(B) =0V;
ID(A) =19mA VDS(A) =5V; V
G2-S =4V; V
DS(B) =V
G1-S(B) =0V;
ID(A) =19mA
Fig 14. Amplifier A: forward transfer admittance and
phase as a function of frequency; typical
values
Fig 15. Amplifier A: revers e transfer admittance and
phase as a function of frequency; typical
values
gain reduction (dB)
0504020 3010
001aac197
12
20
28
ID
(mA)
4
001aaa564
f (MHz)
10 103
102
10−1
1
10
102
bis, gis
(mS)
10−2
bis
gis
001aag358
10
1
102
Yfs
(mS)
10−1
−10
−1
−102
ϕfs
(deg)
−10−1
f (MHz)
10 103
102
Yfs
ϕfs
001aaa566
102
10
103
yrs
(mS)
1
102
10
103
−ϕrs
(deg)
1
f (MHz)
10 103
102
yrs
−ϕrs
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Product data sheet Rev. 01 — 14 April 2010 10 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
8.1.2 Scattering parameters for amplifier A
8.1.3 Noise data for amplifier A
VDS(A) =5V; V
G2-S =4V; V
DS(B) =V
G1-S(B) =0V; I
D(A) =19mA
Fig 16. Amplifier A: output admittance as a function of frequency; typical values
001aag360
1
10−1
10
bos, gos
(mS)
10−2
f (MHz)
10 103
102
bos
gos
Table 9. Scattering parameters for amplifier A
VDS(A) =5V; V
G2-S =4V; I
D(A) =19mA; V
DS(B) =0V;V
G1-S(B) =0V; T
amb = 25
C; typical values.
F
(MHz) s11 s21 s12 s22
Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree)
40 0.9927 4.10 3.1833 175.69 0.0006 92.99 0.9927 1.24
100 0.9897 7.68 3.1743 171.77 0.0011 81.72 0.9923 2.54
200 0.9852 15.36 3.1494 163.56 0.0023 79.23 0.9912 5.09
300 0.9758 22.84 3.1146 155.46 0.0033 74.65 0.9904 7.60
400 0.9655 30.19 3.0718 147.53 0.0042 70.46 0.9890 10.10
500 0.9513 37.55 3.0156 139.61 0.0049 66.38 0.9874 12.60
600 0.9341 44.85 2.9482 131.74 0.0056 62.22 0.9853 15.11
700 0.9160 51.99 2.8755 124.04 0.0061 58.44 0.9832 17.61
800 0.8964 58.99 2.8003 116.41 0.0064 54.48 0.9806 20.12
900 0.8737 65.84 2.7206 108.93 0.0066 50.78 0.9793 22.57
1000 0.8499 72.51 2.6352 101.62 0.0067 46.49 0.9776 25.05
Table 10. Noise data for amplifier A
VDS(A) =5V; V
G2-S =4V; I
D(A) =19mA; V
DS(B) =0V; V
G1-S(B) =0V; T
amb =25
C; typical values;
unless otherwise specified.
f (MHz) NFmin (dB) opt rn (ratio)
(ratio) (degree)
400 0.9 0.77 22.7 0.65
800 1.1 0.73 45.75 0.62
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Product data sheet Rev. 01 — 14 April 2010 11 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
8.2 Dynamic characteristics for amplifier B
[1] For the MOSFET not in use: VG1-S(A) = 0 V; VDS(A) =0 V.
[2] Calculated from S-parameters.
[3] Measured in Figure 34 test circuit.
Table 11. Dynamic char acteristics for amplifier B[1]
Common source; Tamb =25
C; VG2-S =4V; V
DS =5V; I
D= 15 mA; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
yfsforward transfer admittance f = 100 MHz; Tj=25C253040mS
Ciss(G1) input capacitance at gate1 f = 100 MHz [2] -2.12.6pF
Ciss(G2) input capacitance at gate2 f = 100 MHz [2] -3.4-pF
Coss output capacitance f = 100 MHz [2] -0.85-pF
Crss reverse transfer capacitance f = 100 MHz [2] -20-fF
Gtr transducer power gain BS=B
S(opt); BL=B
L(opt)
f = 200 MHz; GS=2mS; G
L= 0.5 mS 31 35 39 dB
f = 400 MHz; GS=2mS; G
L= 1 mS 28 32 36 dB
f = 800 MHz; GS= 3.3 mS; GL= 1 mS 26 30 34 dB
NF noise figure f = 11 MHz; GS=20mS; B
S=0S - 3 - dB
f = 400 MHz; YS=Y
S(opt) -1.11.7dB
f = 800 MHz; YS=Y
S(opt) -1.42.0dB
Xmod cross modulation input level for k = 1 %; fw=50MHz;
funw =60MHz [3]
at 0 dB AGC 90 - - dBV
at 10 dB AGC - 90 - dBV
at 20 dB AGC - 98 - dBV
at 40 dB AGC 102 105 - dBV
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 12 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
8.2.1 Graphics for amplifier B
(1) VG2-S =4V.
(2) VG2-S =3.5V.
(3) VG2-S =3V.
(4) VG2-S =2.5V.
(5) VG2-S =2V.
(6) VG2-S =1.5V.
(7) VG2-S =1V.
VDS(B) =5V; V
DS(A) =V
G1-S(A) =0V; T
j=25C.
(1) VG1-S(B) =1.6V.
(2) VG1-S(B) =1.5V.
(3) VG1-S(B) =1.4V.
(4) VG1-S(B) =1.3V.
(5) VG1-S(B) =1.2V.
(6) VG1-S(B) =1.1V.
(7) VG1-S(B) =1V.
VG2-S =4V; V
DS(A) =V
G1-S(A) =0V; T
j=25C.
Fig 17. Amplifier B: transfer characteristics; typical
values Fig 18. Amplifier B: output characteristics; typical
values
VG1-S (V)
0 2.01.60.8 1.20.4
001aag361
10
20
30
ID
(mA)
0
(4)
(5)
(6)
(7)
(1)
(2)
(3)
VDS (V)
0642
001aag362
8
16
24
ID
(mA)
0
(7)
(6)
(5)
(4)
(3)
(2)
(1)
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Product data sheet Rev. 01 — 14 April 2010 13 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
(1) VG2-S =4V.
(2) VG2-S =3.5V.
(3) VG2-S =3V.
(4) VG2-S =2.5V.
(5) VG2-S =2V.
(6) VG2-S =1.5V.
(7) VG2-S =1V.
VDS(B) =5V; V
DS(A) =V
G1-S(A) =0V; T
j=25C.
(1) VG2-S =4V.
(2) VG2-S =3.5V.
(3) VG2-S =3V.
(4) VG2-S =2.5V.
(5) VG2-S =2V.
(6) VG2-S =1.5V.
(7) VG2-S =1V.
VDS(B) =5V; V
DS(A) =V
G1-S(A) =0V; T
j=25C.
Fig 19. Amplifier B: gate1 current as a functio n of
gate1 voltage; typical values Fig 20. Amplifier B: forward transfer admittance as a
function of drain current; typical value s
VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
Tj=25C. VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
Tj=25C; RG1 =86k(connected to VGG); see
Figure 3.
Fig 21. Amplifie r B: dr ain current as a fun cti on of
gate1 current; typical values Fig 22. Amplifier B: drain current as a function of
gate1 supply voltage; typical values
VG1-S (V)
0 2.01.60.8 1.20.4
001aag363
40
60
20
80
100
IG1
(μA)
0
(1)
(2)
(5)
(7)
(3)
(4)
(6)
ID (mA)
03224816
001aag364
16
24
8
32
40
0
Yfs
(mS) (1)
(2)
(3)
(4)
(5)
(7)
(6)
IG1 (μA)
0504020 3010
001aag365
8
12
4
16
20
ID
(mA)
0
VGG (V)
054231
001aag366
8
12
4
16
20
ID
(mA)
0
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 14 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
(1) RG1 =47k.
(2) RG1 =56k.
(3) RG1 =68k.
(4) RG1 =82k.
(5) RG1 =86k.
(6) RG1 = 100 k.
(7) RG1 = 120 k.
(8) RG1 = 150 k.
(9) RG1 = 180 k.
VG2-S =4V; V
DS(A) =V
G1-S(A) =0V; T
j=25C; RG1 is
connected to VGG; see Figure 3.
(1) VGG =5.0V.
(2) VGG =4.5V.
(3) VGG =4.0V.
(4) VGG =3.5V.
(5) VGG =3.0V.
VDS(B) =5V; V
DS(A) =V
G1-S(A) =0V; T
j=25C;
RG1 =86k(connected to VGG); see Figure 3.
Fig 23. Amplifie r B: dr ain current as a fun cti on of
gate1 supp ly volt age and drain supply volt age;
typical valu e s
Fig 24. Amplifier B: drain current as a function of
gate2 voltage; typical values
VGG = VDS (V)
054231
001aag367
10
15
5
20
25
ID
(mA)
0
(1)
(4)
(5)
(6)
(7)
(8)
(9)
(3)
(2)
VG2-S (V)
0642
001aag368
8
16
24
ID
(mA)
0
(5)
(3)
(2)
(1)
(4)
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 15 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
(1) VGG =5.0V.
(2) VGG =4.5V.
(3) VGG =4.0V.
(4) VGG =3.5V.
(5) VGG =3.0V.
VDS(B) =5V; V
DS(A) =V
G1-S(A) =0V; T
j=25C;
RG1 =86k(connected to VGG); see Figure 3.
VDS(B) =5V; V
GG =5V; V
DS(A) =V
G1-S(A) =0V;
RG1 =86k(connected to VGG); fw=50MHz;
funw =60MHz; T
amb =25C; see Figure 34.
Fig 25. Amplifier B: gate1 current as a functio n of
gate2 voltage; typical values Fig 26. Amplifier B: unwanted voltage
for 1 % cross modulation as a function of gain
reduction; typical values
VDS(B) =5V; V
GG =5V; V
DS(A) =V
G1-S(A) =0V;
RG1 =86k(connected to VGG); f = 50 MHz;
Tamb =25C; see Figure 34.
VDS(B) =5V; V
GG =5V; V
DS(A) =V
G1-S(A) =0V;
RG1 =86k(connected to VGG); f = 50 MHz;
Tamb =25C; see Figure 34.
Fig 27. Amplifier B: gain reduction as a function of
AGC voltage; typical values Fig 28. Amplifier B: drain current as a fu nction of gain
reduction; typical values
001aag369
VG2-S (V)
0642
20
30
10
40
50
IG1
(μA)
0
(5)
(3)
(2)
(1)
(4)
001aag370
gain reduction (dB)
0604020
100
90
110
120
Vunw
(dBμV)
80
VAGC (V)
04312
001aag371
30
20
40
10
0
50
gain
reduction
(dB)
001aag372
gain reduction (dB)
0604020
12
6
18
24
ID
(mA)
0
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 16 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
ID(B) =15mA VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
ID(B) =15mA
Fig 29. Amplifier B: input admittance as a function of
frequency; typical values Fig 30. Amplifier B: forward transfer admittance and
phase as a function of frequency; typical
values
VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
ID(B) =15mA VDS(B) =5V; V
G2-S =4V; V
DS(A) =V
G1-S(A) =0V;
ID(B) =15mA
Fig 31. Amplifier B: reverse transfer admittance and
phase as a function of frequency; typical
values
Fig 32. Amplifier B: output admittance as a function of
frequency; typical values
001aaa581
f (MHz)
10 103
102
10−1
1
10
102
bis, gis
(mS)
10−2
bis
gis
f (MHz)
10 103
102
001aag374
−10
−102
−1
ϕfs
(deg)
10
102
1
Yfs
(mS) Yfs
ϕfs
001aaa583
102
10
103
yrs
(μS)
1
102
10
103
−ϕrs
(deg)
1
f (MHz)
10 103
102
yrs
−ϕrs
001aag376
1
10−1
10
bos, gos
(mS)
10−2
f (MHz)
10 103
102
bos
gos
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 17 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
8.2.2 Scattering parameters for amplifier B
8.2.3 Noise data for amplifier B
Table 12 . Scattering parameters for amplifier B
VDS(B) =5V; V
G2-S =4V; I
D(B) =15mA; V
DS(A) =0V;V
G1-S(A) =0V; T
amb = 25
C; typical values.
f (MHz) s11 s21 s12 s22
Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree) Magnitude
(ratio) Angle
(degree)
40 0.9841 4.20 2.9772 175.44 0.0005 106.03 0.9923 1.40
100 0.9799 7.68 2.9694 171.40 0.0011 88.52 0.9927 2.88
200 0.9775 15.24 2.9472 162.86 0.0023 87.60 0.9914 5.77
300 0.9706 22.70 2.9147 154.41 0.0034 85.98 0.9902 8.61
400 0.9632 30.08 2.8754 146.10 0.0046 85.09 0.9888 11.43
500 0.9515 37.46 2.8213 137.77 0.0056 84.03 0.9870 14.26
600 0.9377 44.80 2.7560 129.44 0.0065 83.30 0.9839 17.16
700 0.9229 52.10 2.6865 121.24 0.0075 82.99 0.9810 20.05
800 0.9062 59.33 2.6119 113.09 0.0084 82.08 0.9777 22.93
900 0.8864 66.35 2.5318 105.04 0.0091 81.36 0.9754 25.77
1000 0.8650 73.21 2.4437 97.11 0.0098 80.34 0.9714 28.64
Table 13. Noise data for amplifier B
VDS(B) =5V; V
G2-S =4V; I
D(B) =15mA; V
DS(A) =0V; V
G1-S(A) =0V; T
amb =25
C; typical values;
unless otherwise specified.
f (MHz) NFmin (dB) opt rn ()
(ratio) (degree)
400 1.1 0.72 22.83 0.66
800 1.4 0.68 46.42 0.64
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 18 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
9. Test information
Fig 33. Cross modula tio n test set-u p for amplifier A
Fig 34. Cross modula tio n test set-u p for amplifier B
50 Ω
10 kΩ
RGEN
50 Ω
RL
50 Ω
50 Ω
RG1
4.7 nF
4.7 nF
4.7 nF
G2 S
G1B DB
DA
4.7 nF
4.7 nF
4.7 nF
G1A
BF1218
VGG
0V
VAGC
L2
2.2 μH
L1
2.2 μH
001aak331
Vi
VDS(A)
5V
VDS(A)
5V
50 Ω
10 kΩ
RGEN
50 Ω50 ΩRG1
4.7 nF
4.7 nF
4.7 nF G2 S
G1B DB
DA
4.7 nF
4.7 nF
4.7 nF
G1A
BF1218
VGG
5V
VAGC
L2
2.2 μH
L1
2.2 μH
RL
50 Ω
001aak332
Vi
VDS(A)
5V
VDS(A)
5V
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 19 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
10. Package outline
Fig 35. Package outline SOT363
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT363 SC-88
wBM
bp
D
e1
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
456
Plastic surface-mounted package; 6 leads SOT363
UNIT A1
max bpcDEe1HELpQywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
04-11-08
06-03-16
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 20 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
11. Abbreviations
12. Revision history
Table 14. Abbreviations
Acronym Description
AGC Automatic Gain Control
DC Direct Current
MOSFET Metal-Oxide Semiconductor Field-Effect Transistor
UHF Ultra High Frequen cy
VHF Very High Frequency
Table 15. Revision history
Document ID Release date Dat a sheet status Change notice Supersedes
BF1218_1 20100414 Product data sheet - -
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 21 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat io n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond tho se described in the
Product data sheet.
13.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ ag gregate and cumulative l iability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semicondu ctors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applicat ions where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application /use or t he application/use of customer’s third party
customer(s) (herei nafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semicondu ctors product is
suitable and fit for the Appl ica tion plann ed. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and t he
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states tha t t his specific NXP Semiconductors product is automotive qualified,
the product is not suit ab le for aut omotive u se. It is neit her qua lified n or t ested
in accordance with automot ive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualifie d products in automotive equipment or applications.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specif ication for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document cont ains the product specification.
BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 14 April 2010 22 of 23
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specificatio ns, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design an d
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specificat ions.
13.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors BF1218
Dual N-channel dual gate MOSFET
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 April 2010
Document identifier: BF1218_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 3
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
8 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
8.1 Dynamic characteristics for amplifier A. . . . . . . 5
8.1.1 Graphics for amplifier A . . . . . . . . . . . . . . . . . . 6
8.1.2 Scattering parameters for amplifier A. . . . . . . 10
8.1.3 Noise data for amplifier A . . . . . . . . . . . . . . . . 10
8.2 Dynamic characteristics for amplifier B. . . . . . 11
8.2.1 Graphics for amplifier B . . . . . . . . . . . . . . . . . 12
8.2.2 Scattering parameters for amplifier B. . . . . . . 17
8.2.3 Noise data for amplifier B . . . . . . . . . . . . . . . . 17
9 Test information. . . . . . . . . . . . . . . . . . . . . . . . 18
10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
11 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
14 Contact information. . . . . . . . . . . . . . . . . . . . . 22
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
